The present invention relates to an integrated current reference circuit.
It is known to provide a constant current generating circuit using two interconnected current mirrors, of which one current mirror is of p FETs and the other is of n FETs. Such circuits have traditionally required one of the branches of the current generator to contain a resistor.
Use of resistors in integrated circuits is not desirable for a number of reasons, for instance because of the temperature dependence thereof, because of the area occupied by a resistor and the difficulty of manufacture.
The present invention therefore aims to at least partly mitigate the difficulties of the prior art.
According to the present invention there is provided an integrated current reference circuit comprising a first current mirror and a second current mirror, the first current mirror having a first diode-connected transistor providing a controlling input and a first controlled transistor having a control electrode connected to that of the first diode-connected transistor, and the second current mirror having a second diode-connected transistor providing a controlling input and a second controlled transistor having a control electrode connected to that of the second diode connected transistor, the first diode-connected transistor and the second controlled transistor and the first controlled transistor and the second diode-connected transistor forming first and second serial branches disposed between a first supply rail and a second supply rail, wherein one of said branches comprises the series connection of voltage offset circuitry and a control transistor having a main current path, the voltage offset circuitry being connected between the control transistor main current path and one of said supply rails, and a control terminal of said control transistor being coupled to said one supply rail.
Preferably said first current mirror comprises p MOSFETs and the second current mirror comprises n MOSFETs.
Advantageously said second diode-connected transistor is large by comparison with said second controlled transistor.
Conveniently said control transistor is a p MOSFET having its control terminal coupled to the negative supply rail.
Advantageously the voltage offset circuitry comprises a diode.
Conveniently the diode comprises a diode-connected FET.
Conveniently both said first and second branches comprise voltage offset circuitry.
Preferably said circuit further comprises an output transistor having a control electrode connected to the control electrode of the first diode-connected transistor of the first current mirror.